A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed–Solomon Decoding

Javier Valls; Vicente Torres; Maria José Canet; Francisco M. Garcia-Herrero

首页> 外文期刊>Circuits and Systems I: Regular Papers, IEEE Transactions on >A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed–Solomon Decoding

【24h】

A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed–Solomon Decoding

机译：低复杂度追逐软判决里德-所罗门解码的基于符号错误概率的测试矢量生成方法

获取原文

获取原文并翻译 | 示例

开具论文收录证明 >>

页面导航

摘要
著录项
引文网络
相似文献
相关主题

摘要

This paper presents a low-complexity chase (LCC) decoder for Reed–Solomon (RS) codes, which uses a novel method for the selection of test vectors that is based on the analysis of the symbol error probabilities derived from simulations. Our results show th

机译：本文介绍了一种针对里德-所罗门（RS）码的低复杂度追赶（LCC）解码器，该解码器使用了一种新的测试向量选择方法，该方法基于对仿真得出的符号错误概率的分析。我们的结果表明

著录项

来源
《Circuits and Systems I: Regular Papers, IEEE Transactions on》 |2019年第6期|2198-2207|共10页
作者
Javier Valls; Vicente Torres; Maria José Canet; Francisco M. Garcia-Herrero;
展开▼
作者单位

Instituto de Telecomunicaciones y Aplicaciones Multimedia Universitat Politècnica de València Valencia Spain;

Instituto de Telecomunicaciones;

展开▼
收录信息
原文格式 PDF
正文语种 eng
中图分类
关键词
Decoding; Reliability; Complexity theory; Error probability; Binary phase shift keying; Field programmable gate arrays; Encoding;

机译：解码;可靠性;复杂性理论;错误概率;二进制相移键控;现场可编程门阵列;编码方式;

相似文献

外文文献
中文文献
专利

1. An Algorithm for Improving the Throughput of Serial Low-Complexity Chase Soft-Decision Reed–Solomon Decoder [J] . Haowen Luo, Wei Zhang, Yang Wang, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2017,第12期

机译：一种提高串行低复杂度追逐软判决里德-所罗门解码器吞吐量的算法
2. Novel Interpolation and Polynomial Selection for Low-Complexity Chase Soft-Decision Reed-Solomon Decoding [J] . Zhang X. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2012,第7期

机译：低复杂度追逐软判决Reed-Solomon解码的新型插值和多项式选择
3. Low-power high-efficiency architecture for low-complexity chase soft-decision Reed??Solomon decoding [J] . Zhang W., Wang J., Wang H., Communications, IET . 2012,第17期

机译：低复杂度的低功耗高效架构追逐软判决Reed ?? Solomon解码
4. Low-complexity architecture for Chase soft-decision Reed-Solomon decoding [C] . Lu Yung-Kuei, Chung Shen-Ming, Shieh Ming-Der International Symposium on VLSI Design, automation, and Test . 2014

机译：追逐软判决Reed-Solomon解码的低复杂度架构
5. FPGA Implementation of Iterative Soft-Decision Decoder for the (127,119) Reed-Solomon Code [D] . Girisankar, Sree Balaji. 2017

机译：（127,119）Reed-Solomon码的迭代软判决解码器的FPGA实现
6. Methods system errors and demographic differences in participant errors using daily text message-based short message service computer-assisted self-interview (SMS-CASI) to measure sexual risk behavior in a RCT of HIV self-test use [O] . William Brown III, Alan Sheinfil, Javier Lopez-Rios, 2019

机译：使用每日基于短信的短信服务计算机辅助自我访谈（SMS-CASI）来测量HIV自测使用的RCT中的性风险行为的方法系统错误和参与者错误的人口统计学差异
7. A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed–Solomon Decoding [O] . Javier Valls, Vicente Torres, Maria Jose Canet, 2019

机译：基于符号误差概率的测试向量生成方法，用于低复杂性追逐软判决簧片解码
8. More on the decoder error probability for Reed-Solomon codes [R] . Cheung, K.-M. 1987

机译：更多关于Reed-solomon码的解码器错误概率

A Test Vector Generation Method Based on Symbol Error Probabilities for Low-Complexity Chase Soft-Decision Reed–Solomon Decoding

摘要

著录项

引文网络

相似文献

相关主题

期刊订阅