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首页> 外文期刊>IEEE transactions on circuits and systems . I , Regular papers >A Low Power Diode-Clamped Inverter-Based Strong Physical Unclonable Function for Robust and Lightweight Authentication
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A Low Power Diode-Clamped Inverter-Based Strong Physical Unclonable Function for Robust and Lightweight Authentication

机译:基于低功耗二极管钳位逆变器的强大物理不可克隆功能,可实现轻巧可靠的认证

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Strong physical unclonable function (PUF) transcends the limitations of legacy secure key storage methods as emerging security primitive for cryptography and device identification/authentication. In this paper, a new low power and reliable mono-stable strong PUF is proposed. Its primary entropy is derived from the process variations of the parallel diode-clamped single inverter ring working in the subthreshold region. Due to manufacturing process variations, the monostable state of the output voltage of single inverter ring is Gaussian distributed around the half Vdd point. The spread of the Gaussian is broadened by mixing it with another Gaussian distributed trip point obtained from a diode-clamped parallel inverter stage. As the main entropy of the raw response bits is derived from a mono-stable circuit, it has greater immunity to perturbances introduced by operating environments. In addition, as the mono-stable state for the output voltage is a non-linear combination of individual inverter rings, the resilience against machine learning attacks can be improved. The prototype chip was fabricated using a commercial 40-nm CMOS technology. The measurement results show that the power consumption of the 64-bit mono-stable PUF is merely 3.85 μW. The native bit error rate is <;8% at 0.9 ~ 1.3 V and -40~ 90°C, which can be further reduced to <;1% using the proposed thresholding technique. The proposed PUF reduces the accuracy of support vector machine and reliability-based covariance matrix adaptation evolution strategy attacks by 36× and 75×, respectively, over that of arbiter PUF.
机译:强大的物理不可克隆功能(PUF)超越了传统安全密钥存储方法的局限性,成为了用于加密和设备标识/认证的新兴安全原语。本文提出了一种新的低功耗,可靠的单稳态强PUF。它的主要熵来自工作在亚阈值区域的并联二极管钳位的单个逆变器环的过程变化。由于制造工艺的变化,单个逆变器环的输出电压的单稳态在高半个Vdd点附近呈高斯分布。通过将高斯分布与从二极管钳位的并联逆变器级获得的另一个高斯分布跳变点混合,可以扩大其分布范围。由于原始响应位的主要熵来自于单稳态电路,因此它对操作环境引起的干扰具有更大的抵抗力。另外,由于输出电压的单稳态是单个逆变器环的非线性组合,因此可以提高抵抗机器学习攻击的能力。原型芯片是使用商业40纳米CMOS技术制造的。测量结果表明,64位单稳态PUF的功耗仅为3.85μW。在0.9〜1.3 V和-40〜90°C时,本机误码率<; 8%,使用建议的阈值技术可以进一步降低到<%1%。与仲裁器PUF相比,拟议的PUF将支持向量机和基于可靠性的协方差矩阵适应进化策略攻击的精度分别降低了36倍和75倍。

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