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CMOS Ultrasound Transceiver Chip for High-Resolution Ultrasonic Imaging Systems

机译:用于高分辨率超声成像系统的CMOS超声收发器芯片

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The proposed CMOS ultrasound transceiver chip will enable the development of portable high resolution, high-frequency ultrasonic imaging systems. The transceiver chip is designed for close-coupled MEMS transducer arrays which operate with a 3.3-V power supply. In addition, a transmit digital beamforming system architecture is supported in this work. A prototype chip containing 16 receive and transmit channels with preamplifiers, Time-Gain compensation amplifiers, a multiplexed Analog-to-Digital converter with 3 kB of on-chip SRAM, and 50-MHz resolution time delayed excitation pulse generators has been fabricated. By utilizing a shared A/D converter architecture, the number of A/D converter and SRAM is cut down to one, unlike typical digital beamforming systems which need 16 A/D converters for 16 receive channels. The chip was fabricated in a 0.35-$ mu{rm m}$ standard CMOS process. The chip size is 10 ${rm mm}^{2}$, and its average power consumption in receive mode is approximately 270 mW with a 3.3-V power supply. The transceiver chip specifications and designs are described, as well as measured results of each transceiver component and initial pulse-echo experimental results are presented.
机译:拟议的CMOS超声波收发器芯片将使便携式高分辨率,高频超声波成像系统的开发成为可能。收发器芯片设计用于采用3.3V电源的紧密耦合MEMS换能器阵列。此外,这项工作还支持发射数字波束成形系统架构。已制造出一个原型芯片,该芯片包含16个具有前置放大器的接收和发送通道,时间增益补偿放大器,具有3 kB片上SRAM的多路复用模数转换器以及50 MHz分辨率的时间延迟激励脉冲发生器。通过利用共享的A / D转换器体系结构,A / D转换器和SRAM的数量减少到一个,这与典型的数字波束形成系统不同,后者需要16个A / D转换器来支持16个接收通道。该芯片是用0.35美元(μm)的标准CMOS工艺制造的。芯片尺寸为10 $ {rm mm} ^ {2} $,在3.3 V电源下,其接收模式下的平均功耗约为270 mW。描述了收发器芯片的规格和设计,以及每个收发器组件的测量结果和初始脉冲回波实验结果。

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