A Frequency Shaping Neural Recorder With 3 pF Input Capacitance and 11 Plus 4.5 Bits Dynamic Range

摘要

This paper presents a frequency-shaping (FS) neural recording architecture and its implementation in a 0.13 $mu$ m CMOS process. Compared with its conventional counterpart, the proposed architecture inherently rejects electrode offset, increases input impedance 5–10 fold, compresses neural data dynamic range (DR) by 4.5-bit, simultaneously records local field potentials (LFPs) and extracellular spikes, and is more suitable for long-term recording experiments. Measured at a 40 kHz sampling clock and ${pm} 0.6$ V supply, the recorder consumes 50 $mu$W/ch, of which 22 $,mu$W per FS amplifier, 24 $mu$ W per buffer, 4 $mu$ W per 11-bit successive approximation register analog-to-digital converter (SAR ADC). The input-referred noise for LFPs and extracellular spikes are 13 $,mu$ Vrms and 7 $mu$Vrms, respectively, which are sufficient to achieve high-fidelity full-spectrum neural data. In addition, the designed recorder has a 3 pF input capacitance and allows “ $11+4.5$”-bit neural data DR without system saturation, where the extra 4.5-bit owes to the FS technique. Its figure-of-merit (FOM) based on data DR reaches 36.0 fJ/conversion-step.