A 256-Mb SDRAM is implemented with a 0.12-μm technology to verify three circuit schemes suitable for low-voltage operation. First, a new charge-transferred presensing achieves fast stable low-voltage sensing performance without additional bias levels required in conventional charge-transferred presensing schemes. Second, a negative word-line scheme is proposed to bypass the majority of discharging current to VSS. Without switching signals, main discharging paths are automatically switched from VSS to VBB2 in response to the voltage of each discharging node itself. Finally, to initialize internal nodes during power-up, a temperature-insensitive power-up pulse generator is also proposed. The temperature coefficient of the setup voltage is adjustable through optimization of circuit parameters.
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