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Single Exciton Quantum Logic Circuits

机译:单激子量子逻辑电路

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We describe new logic devices based on the storage and shuttling of individual excitons, called the single exciton quantum (SEQ) logic. SEQ logic can implement memory, concatenation, fan-out, and gain. The logic circuits are based on quasi 1-D semiconductors that are coupled to quantum dots (QDs) and on the engineering of their respective exciton states. The coding of binary states is based on the presence or absence of excitons in the QD, and the 1-D semiconductors serve as interconnects for shuttling excitons from one QD to another. Here, the QD serves as memory where the storage of excitonic excitations can be controlled electrically. Their transfer between 1-D semiconductors and QDs occurs through efficient nonradiative resonant energy transfer mechanisms. To allow low-power operations, the excitonic energy levels are cascaded to allow funneling of excitons where in the transfer of information is set to flow naturally in the direction of lower energy states. The principle of energy funnel, coupled with high drift velocity of excitons expected in 1-D semiconductors, allows low power, high speed logic circuits that can operate at room temperature. The use of excitons as a state-variable lends naturally to implementing optical interconnects for the input and output of an all-excitonic chip. Here, we describe the fundamental principles behind the proposed SEQ logic circuits, and describe the implementation of a universal nand logic.
机译:我们基于单个激子的存储和穿梭来描述新的逻辑设备,称为单激子量子(SEQ)逻辑。 SEQ逻辑可以实现存储,串联,扇出和增益。逻辑电路基于耦合至量子点(QD)的准1-D半导体,并基于其各自的激子态的工程设计。二进制状态的编码是基于QD中激子的存在或不存在,而一维半导体用作将激子从一个QD穿梭到另一个QD的互连。在此,QD用作存储器,可以以电方式控制激子激发的存储。它们在一维半导体和量子点之间的转移是通过有效的非辐射共振能量转移机制发生的。为了允许低功率运行,激子能级被级联以允许激子漏斗化,其中信息的传递被设置为自然地向低能态流动。能量漏斗的原理与1-D半导体中期望的激子的高漂移速度相结合,使低功耗,高速逻辑电路可以在室温下工作。激子作为状态变量的使用自然有助于为全激子芯片的输入和输出实现光学互连。在这里,我们描述了提出的SEQ逻辑电路背后的基本原理,并描述了通用nand逻辑的实现。

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