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首页> 外文期刊>IEE Proceedings. Part G, Circuits, Devices and Systems >Mathematical techniques for low-cost optimisation of digital MOS circuits
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Mathematical techniques for low-cost optimisation of digital MOS circuits

机译:低成本优化数字MOS电路的数学技术

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摘要

The author discusses, optimisation methods for MOS VLSI digital circuits. Typically, signal delay, chip area and power dissipation are the optimisation criteria. Since they are in conflict, complex multiobjective programming problems have to be solved. Novel mathematical methods are presented, which allow for a complete and accurate solution at low computational cost. The new methods guarantee that only the relevant global design optima are calculated. There is no confusion with solutions that are only of local optimality. This reduces the numerical effort and eliminates convergence problems found for other algorithms.
机译:作者讨论了MOS VLSI数字电路的优化方法。通常,信号延迟,芯片面积和功耗是优化标准。由于它们之间存在冲突,因此必须解决复杂的多目标编程问题。提出了新颖的数学方法,这些方法可以以较低的计算成本提供完整而准确的解决方案。新方法可确保仅计算相关的全局设计最优值。与仅具有局部最优性的解决方案没有混淆。这减少了数值工作,并消除了其他算法发现的收敛问题。

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