Fabrication of PMOS transistors by dopant implantation into TiSi/sub 2/

摘要

Implantation into TiSi/sub 2/ and low-temperature annealing have been used to form P/sup +/ junctions and fabricate PMOS transistors. Spreading resistance measurements have shown that shallow, low-resistance junctions can be formed by this method. Dopant penetration through the silicide occurs above a certain implant energy, while outdiffusion from the silicide is observed to be somewhat inhibited. Electrical characterisation of the PMOS devices fabricated has shown that they have excellent device characteristics and are comparable to more conventionally fabricated devices.