High-Energy Ion Implantation for Bipolar Transistor Fabrication

摘要

The development of a complementary vertical bipolar process, referred to as UT-COVER, for a 500 kV ion implanter, a keystone in the fabrication of semiconductor devices, is described. Both npn and pnp transistors are made vertically and high energy ion implantation is applied to create the collector regions. The basic bipolar device operation is reviewed with special consideration given to the phenomena relevant to the transistors realized in the UT-COVER process, e.g., the polysilicon emitter effect. The general characteristics of the UT-COVER process are discussed. Special attention is paid to the formation of the collector and isolation regions, which are realized by deep ion implantation. The impact on the device parameters is discussed. To make the npn transistor suitable for circuits with a 3 V supply voltage, the use of a polysilicon emitter is indispensable. In order to attain a similar performance for both types of transistors, the pnp device is made vertically instead of laterally. The standard pnp transistor is equipped with an implanted emitter, but also pnp devices with a polysilicon emitter are considered in greater depth. The process sequence is discussed and several process steps are treated. The measurement results are discussed: DC characteristics and AC measurements of the realized transistors are presented; a yield analysis of the npn transistors is given; the pnp transistors with a polysilicon emitter are compared to their counterparts with an implanted emitter region; and measured doping profiles are presented.