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Multiple-inputs systolic priority queue for fast sequential decoding of convolutional codes

机译:多输入收缩优先队列,用于卷积码的快速顺序解码

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The operating speed of a sequential decoder with stack algorithm is usually limited by the time to search the best node for further extension. This problem can be completely alleviated by using the systolic priority queue to replace the stack memory. However, the systolic priority queues developed previously are accessible only in the cases when the number of inputs processed is small. This is because the complexity of a queue grows up quickly as the volume of data flowing through it increases. Since the largest amount of data flowing through a systolic priority queue is equal to the number of inputs to this queue, the systolic priority queue is not suitable for a system with many inputs. A modified version of previously developed circuits is proposed. The number of transmission gates required in this circuit is proportional to 3N instead of N/sup 2/, where N is the number of inputs. Also the total number of control signals is proportional to 3N/sup 2/ instead of N/sup 3/. But the number of comparators required is proportional to C/sub 2//sup N+1/, as before. This modified circuit can be used in cases where the number of inputs is small (N/spl les/8). A new algorithm for the multiple-inputs systolic priority queue (MISPQ) is proposed. By using this algorithm, a MISPQ may be implemented with several smaller queues, each is used to process a part of data in the MISPQ. Since the volume of data flowing through each queue is small, these queues will be simpler. However, some additional circuits should be used for the interactions between queues. A circuit for implementing this algorithm is presented and its complexity is analysed. The number of transmission gates for the MISPQ is proportional to 3N, the number of control signals is proportional to (3N/sup 2//2), and the number of comparators is proportional to 4C/sub 2//sup N/2+1/. Thus this new architecture is feasible for large N (e.g.N/spl ges/8).
机译:具有堆栈算法的顺序解码器的运行速度通常受搜索最佳节点进行进一步扩展的时间限制。通过使用收缩优先级队列来替换堆栈内存,可以完全缓解此问题。但是,只有在处理的输入数量很少的情况下,才能访问先前开发的脉动优先级队列。这是因为队列的复杂度随着流经队列的数据量的增加而迅速增长。由于流过脉动优先级队列的最大数据量等于此队列的输入数量,因此脉动优先级队列不适用于具有许多输入的系统。提出了先前开发的电路的修改版本。该电路所需的传输门数量与3N成正比,而不是N / sup 2 /,其中N是输入数量。同样,控制信号的总数与3N / sup 2 /成正比,而不是N / sup 3 /。但是,所需的比较器数量与C / sub 2 // sup N + 1 /成正比。在输入数量很少(N / spl les / 8)的情况下,可以使用这种改进的电路。提出了一种用于多输入收缩期优先队列(MISPQ)的新算法。通过使用此算法,可以用几个较小的队列来实现MISPQ,每个队列用于处理MISPQ中的一部分数据。由于流经每个队列的数据量很小,因此这些队列将更简单。但是,应将一些其他电路用于队列之间的交互。给出了实现该算法的电路,并分析了其复杂度。 MISPQ的传输门数量与3N成正比,控制信号数量与(3N / sup 2 // 2)成正比,比较器的数量与4C / sub 2 // sup N / 2 +成正比。 1 /。因此,这种新架构对于大N(例如N / spl ges / 8)是可行的。

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