From DSM-Based Planning to Design Process Simulation: A Review of Process Scheme Logic Verification Issues

摘要

Planning product development processes (PDP), and particularly new product development (NPD) processes, is complex and challenging. The plan should reflect the product-related knowledge, including the influences of performing changes in one product component on the need to rework the design of other components. Given the complexity, dynamics, and uncertainties of design processes (DPs), the plan evaluation requires simulation tools. The design structure matrix (DSM) is a known method for DP planning. However, the DSM itself does not express all the relevant information required for defining process logic. Many logic interpretations are applicable in different business cases; yet, a consistent method of transforming a DSM-based plan to a logically correct concurrent process model in the case of iterative activities is lacking. A gap was identified between the literature concerning activities sequencing based on DSM and the process modeling literature concerning process verification. This survey systematically classifies the approaches used in DSM-based process planning, and discusses their strengths and limitations with problems related to process modeling logic verification of iterative processes. Demonstration of the logic differences emphasizes the need for simulation-based decision making according to the specific process attributes.