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Improving the Performance of Shared Memory Communication in Impulse C

机译:在脉冲C中提高共享内存通信的性能

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With the evolution of field-programmable gate arrays (FPGAs) to the Million-Gate scope, high-level languages are gaining popularity in electronic system design, which greatly improves design and verification efficiency. Impulse C is a high-level language widely used in software/hardware (SW/HW) codesign and provides users with varies SW/HW communication mechanisms. But the communication mechanisms of Impulse C are mainly designed for versatility, and the resources within the FPGA chip is not fully utilized. In this letter, we present a improved implementation of the shared memory communication in Impulse C by utilizing both ports of the dual-port BRAM. Experiment results show that the improved implementation can greatly improve the performance of shared memory communication, and further improve the execution efficiency of hardware processes.
机译:随着现场可编程门阵列(FPGA)到Million-Gate范围的发展,高级语言在电子系统设计中日益流行,这大大提高了设计和验证效率。 Impulse C是一种高级语言,广泛用于软件/硬件(SW / HW)代码签名中,并为用户提供各种SW / HW通信机制。但是,Impulse C的通信机制主要是为通用性而设计的,FPGA芯片内的资源并未得到充分利用。在这封信中,我们介绍了通过利用双端口BRAM的两个端口在脉冲C中改进的共享内存通信的实现。实验结果表明,改进后的实现可以大大提高共享内存通信的性能,并进一步提高硬件过程的执行效率。

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