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SoC Challenges Test Infrastructure

机译:SoC挑战测试基础架构

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With the availability of advanced integrated-circuit (IC) design methodologies and high-density process technologies, semicon-ductor manufacturers can create system-on-chip (SoC) devices that integrate diverse digital and analog cores in chips of unprecedented size and functionality. Despite all the benefits of advanced design and fabrication capabilities, however, IC manufacturers face unprecedented challenges in moving these complex devices to volume production quickly and cost-effectively. In combining several functional blocks in a single device, today's SoC devices challenge the ability of traditional test methodologies to reduce time-to-volume and cost-of-test. As a result, manufacturers are turning to more comprehensive approaches that are able to achieve more effective test program development, speed first-silicon verification and enable cost-effective production test despite fast-changing test requirements. By efficiently leveraging design and test resources, these new approaches offer a more effective SoC design-to-production-test solution able to reduce both time-to-volume and cost-of-test of increasingly complex SoC devices.
机译:借助先进的集成电路(IC)设计方法和高密度工艺技术,半导体制造商可以创建片上系统(SoC)器件,该器件将各种数字和模拟内核集成到前所未有的尺寸和功能的芯片中。尽管具有先进的设计和制造功能的所有优点,但是,IC制造商在将这些复杂的设备快速且经济高效地批量生产中仍面临着前所未有的挑战。通过将多个功能块组合到一个设备中,当今的SoC设备挑战了传统测试方法减少批量生产时间和降低测试成本的能力。结果,制造商正在转向更全面的方法,尽管测试要求瞬息万变,但这些方法能够实现更有效的测试程序开发,加快第一硅验证的速度并实现具有成本效益的生产测试。通过有效地利用设计和测试资源,这些新方法提供了更有效的SoC设计到生产测试解决方案,能够减少越来越复杂的SoC器件的批量生产时间和测试成本。

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