Triple-Well Process Cuts Flash-Memory Storage-Cell Size, Boosts Performance

摘要

A triple-well channel-erase NOR technology promises higher density and faster flash memories. Initially, the process will be used by Hyundai Electronics America, San lose, Calif., to produce 16-Mbit flash memories implemented with 0.35-μm design rules. Plans are already in motion, however, to quickly convert to 0.25-μm design rules for higher-density devices. When fabricated on the smaller design rules, the memory cell size is just 0.69 μm~2.