首页> 外文期刊>Electron Devices, IEEE Transactions on >2D Strain FET (2D-SFET)-Based SRAMs—Part II: Back Voltage-Enabled Designs
【24h】

2D Strain FET (2D-SFET)-Based SRAMs—Part II: Back Voltage-Enabled Designs

机译:2D菌株FET(2D-SFET)基于SRAM - 第II部分:支持电压的设计

获取原文
获取原文并翻译 | 示例
           

摘要

In Part I of this article, we had discussed the device characteristics of 2D Strain FET (2D-SFET) and 6T-SRAM with 2D-SFET used as a drop-in replacement for 2D-FET. Here (in Part II), we propose 2D-SFET-based 6T-SRAM designs targeted toward improving cell robustness (which is otherwise low in 2D-SFET SRAMs analyzed in Part I). Our 2D-SFET-based 6T-SRAM designs, namely Schmitt Trigger (ST) SRAM, Schmitt Trigger with Data-Driven Access Feedback (ST-DAF) SRAM and Schmitt Trigger with Dual Word-line (ST-DWL) SRAM leverage back voltage ( ${V}_{B}$ )-driven dynamic bandgap change in 2D-SFET to mitigate the design conflicts. We show that in all designs ST action is achieved by dynamically tuning the strength of pull-up 2D-SFETs enabled by ${V}_{B}$ . This along with other optimizations result in up to 33% higher read stability in the proposed designs over 2D-FET-based standard 6T SRAM, while mitigating the design conflicts present in standard 6T SRAMs. Our analysis also highlights the benefits and trade-offs for write and hold operations for each of our designs. All the proposed 2D-SFET ${V}_{B}$ -enabled SRAMs achieve the enhanced functionalities at iso-area compared to 2D-SFET drop-in SRAM in Part I.
机译:在本文的第一部分中,我们讨论了2D菌株FET(2D-SFET)和6T-SRAM的器件特性,其中2D-SFET用作2D-FET的替代品。这里(在第二部分)中,我们提出了基于2D-SFET的6T-SRAM设计,该设计旨在改善细胞稳健性(在第I部分分析的2D-SFET SRAM中否则否则)。我们的2D-SFET 6T-SRAM设计,即Schmitt Trigger(ST)SRAM,Schmitt触发器,带有数据驱动的访问反馈(ST-DAF)SRAM和SCHMITT触发器,带双字线(ST-DWL)SRAM利用后电压(<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ {v} _ {b} $ )-DRIVED 2D-SFET的动态带隙更改,以减轻设计冲突。我们表明,在所有设计中,通过动态调整所启用的上拉2D-SFET的强度来实现ST行动<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ {v} _ {b} $ 。此外,其他优化以及基于2D-FET的标准6T SRAM的建议设计中的读取稳定性高达33%,同时减轻标准6T SRAM中存在的设计冲突。我们的分析还强调了为我们每个设计的写作和持有操作的福利和权衡。所有提议的2D-SFET<内联公式XMLNS:MML =“http://www.w3.org/1998/math/mathml”xmlns:xlink =“http://www.w3.org/1999/xlink”> $ {v} _ {b} $ - “可信SRAM”实现增强功能 iso -AREA与第I部分中的2D-SFET滴在SRAM相比。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号