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首页> 外文期刊>IEEE Electron Device Letters >Complementary AlGaAs/GaAs HBT I/sup 2/L (CHI/sup 2/L) technology
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Complementary AlGaAs/GaAs HBT I/sup 2/L (CHI/sup 2/L) technology

机译:互补Algas / Gas Habat E /汤2 / L(Chi /汤2 / L)技术

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摘要

The monolithic integration of non-self-aligned AlGaAs/GaAs N-p-n and P-n-p HBTs with selective organometallic vapor-phase epitaxy (OMVPE) has been utilized to demonstrate a low-power high-speed integrated injection logic (I/sup 2/L) technology. Seventeen-stage ring oscillators with a logic swing of 0.7 V exhibited a delay of 65 ps per gate with power dissipation of 13 mW per gate for a speed-power product of 850 fJ. This value was in excellent agreement with SPICE simulations based on extracted device parameters which predicted a speed-power product of 840 fJ. Additional simulations predicated a 28-fJ speed-power product and more than a factor of 2 reduction in gate delay with improved epitaxial design and use of submicrometer emitters and self-aligned processing.
机译:非自对准AlGaAs / GaAs Npn和Pnp HBT与选择性有机金属气相外延(OMVPE)的单片集成已被用于演示低功耗高速集成注入逻辑(I / sup 2 / L)技术。逻辑摆幅为0.7 V的十七级环形振荡器在每个闸门上具有65 ps的延迟,而每个闸门的功耗为13 mW,因此速度功率积为850 fJ。该值与基于提取的设备参数的SPICE仿真非常吻合,该参数预测出840 fJ的速度-功率积。附加的仿真表明,采用改进的外延设计,使用亚微米发射器和自对准处理,可以提供28-fJ的速度-功率乘积,并使栅极延迟减少2倍以上。

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