首页> 外文期刊>Electron Device Letters, IEEE >Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors
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Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

机译:高电子迁移率晶体管的非合金欧姆接触使用Ge钝化金属-中间层-半导体结构的费米能级钉扎

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摘要

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal–interlayer–semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge-GaAs ( cm structure exhibits a reduction compared with that of a Ti-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.
机译:我们证明了在源/漏(S / D)接触的金属-中间层-半导体结构中,锗钝化与ZnO中间层结合使用。通过插入薄的Ge钝化层和ZnO中间层,钝化GaAs表面并分别减小GaAs表面上的金属引起的间隙态,可以有效地缓解导致S / D接触中接触电阻较大的费米能级钉扎问题。 。与Ti / n-GaAs结构相比,Ti / ZnO / Ge / n-GaAs(cm结构)的比接触电阻率降低了。这些结果表明,所提出的结构显示出在高合金化条件下作为非合金欧姆接触的希望。电子迁移率晶体管。

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