Optimization and Experiments of Lateral Semi-Superjunction Device Based on Normalized Current-Carrying Capability

摘要

A lateral double diffused metal oxide semiconductor transistor with the semi-superjunction (semi-SJ LDMOS) is optimized based on the normalized current-carrying capability (CC) and experimentally realized in this letter. The device is fabricated based on an optimized equivalent substrate and the semi-SJ is introduced near the source. The semi-SJ increases the local doping concentration in the N regions meanwhile reduces the current path area and carrier mobility, resulting in the variation of CCs before and after the introduction of the semi-SJ. The normalized CC factor eta(C) is proposed to evaluate this variation, with which the minimum specific on-resistance R-ON,R- sp is predicted by the condition of eta(C) = 1. The experiments of the semi-SJ LDMOS exhibit a minimum RON, sp of 25.5 m Omega.cm(2) under a breakdown voltage V-B of 464.3 V. This represents a reduction in R-ON,R- sp by 37.7% when compared with the theoretical R-ON,R- sp of triple RESURF devices.