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Including dielectric loss in printed circuit models for improved EMI/EMC predictions

机译:在印刷电路模型中包括介电损耗,以改善EMI / EMC预测

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The properties of printed circuit boards (PCBs) pertinent to electromagnetic interference/compatibility (EMI/EMC) are commonly studied using circuit models. This paper describes a method for improving these models by including the effects of frequency-dependent dielectric loss. The approach can be applied to discrete capacitors, microstrips, striplines, power buses, and power planes. The loss terms, which are expressible as frequency-dependent conductances shunting capacitors in the models, can be closely approximated over a wide frequency range as the real part of the driving-point admittance of a resistor-capacitor network. The method is applied to the important case of shunt loss conductance proportional to frequency, but other dielectric classes are as easily treated. An example power bus is analyzed for typical electrical responses, demonstrating the application of this approach, and showing the effect that frequency-dependent dielectric losses can have on the responses.
机译:通常使用电路模型研究与电磁干扰/兼容性(EMI / EMC)相关的印刷电路板(PCB)的特性。本文介绍了一种通过包含频率相关介电损耗的影响来改善这些模型的方法。该方法可以应用于分立电容器,微带,带状线,电源总线和电源平面。损耗项在模型中可表示为与频率相关的电导并联电容器,在电阻器-电容器网络的驱动点导纳的实部中,可以在很宽的频率范围内近似估算损耗项。该方法适用于与频率成比例的并联损耗电导的重要情况,但是其他介电等级也很容易处理。分析了示例电源总线的典型电响应,演示了该方法的应用,并显示了频率相关的介电损耗可能对响应产生的影响。

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