Modeling and Hardware Implementation on the FPGA of a Variable Structure Control Associated with a DTC-SVM of an Induction Motor

摘要

The conventional Direct Torque Control (DTC) is considered as a powerful approach which is widely used to control induction motors. However, this control approach suffers from several problems like undesirable torque and flux ripples and stator resistance variations, especially at low speed. To overcome these problems, a Variable Structure Control associated with a DTC based on Space Vector Modulation (VSC-DTC-SVM) is proposed in this paper to reduce ripples and enhance the system robustness. Due to the complex scheme of the suggested VSC-DTC-SVM approach, its implementation on software solutions such as microcontrollers and digital signal processors requires a high sampling period. In fact, this period creates delay in applying the inverter switching states which results undesirable ripples and distortions in the torque and the stator current, respectively. This delay is inevitable, and thus the VSC-DTC-SVM performances are affected and the sampling frequency is limited. These limitations in digital control are mainly caused by the calculation speed which depends on the complexity of the algorithm and the serial processing of the software solutions. To cope with this problem, a programmable digital circuit such as the FPGA is chosen to preserve the performances of the VSC-DTC-SVM in spite of its complexity, thanks to its parallel processing. To illustrate this, a hardware implementation of the VSC-DTC-SVM of an induction motor on the FPGA is presented and analyzed. The VSC-DTC-SVM performances in terms of ripples, under stator resistance variation, are presented by a theoretical study, a digital simulation and a hardware co-simulation using an FPGA Virtex 5.