首页> 外文期刊>IEEE Transactions on Education >Integrating UAHPL-DA systems with VLSI design tools to support VLSI DA courses
【24h】

Integrating UAHPL-DA systems with VLSI design tools to support VLSI DA courses

机译:将UAHPL-DA系统与VLSI设计工具集成以支持VLSI DA课程

获取原文
获取原文并翻译 | 示例
       

摘要

A complete operational environment established with the help of state-of-the-art tools, to support courses in design automation (DA) of VLSI circuits, is described. It was accomplished with the integration of two systems: (1) a DA system which automatically produces VLSI layouts of digital systems modeled in Universal Hardware Programming Language (UAHPL); and (2) a set of VLSI tools, which in addition to several other functions can be used for simulation and verification of layout designs. Compared with other approaches, the integrated DA system provides a very simple user interface, fast turnaround time, no restriction on the final structure of the layout, and simulation and verification of all phases of design. The new environment, called UAHPL-based VLSI DA, is excellent for teaching and research at universities.
机译:描述了借助最先进的工具建立的完整操作环境,以支持VLSI电路的设计自动化(DA)课程。它是通过两个系统的集成来完成的:(1)DA系统,该系统自动生成以通用硬件编程语言(UAHPL)建模的数字系统的VLSI布局; (2)一套VLSI工具,除其他几个功能外,还可用于布局设计的仿真和验证。与其他方法相比,集成的DA系统提供了非常简单的用户界面,快速的周转时间,对布局的最终​​结构没有限制,并且对设计的所有阶段进行了仿真和验证。新环境称为基于UAHPL的VLSI DA,非常适合在大学中进行教学和研究。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号