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Modified design for Full Swing SERF and High Speed SERF

机译:全摆幅SERF和高速SERF的改进设计

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In this chapter we have discussed the research work done on the basis of literature review and study. The research methodology and the techniques to modify the present designs in order to achieve better performance have been discussed with their merits and demerits. In this paper FS-SERF and HS- SERF full adder topologies are presented. The analysis of Power, Delay, Power Delay Product (PDP) optimization characteristics of SERF Adder is designed. In order to achieve optimal power savings at smaller geometry sizes, proposed a heuristic approach known as FS-SERF and HS-SERF adder model.
机译:在这一章中,我们讨论了在文献综述和研究基础上所做的研究工作。讨论了其研究方法和技术以修改本设计以获得更好的性能,并各有其优缺点。本文介绍了FS-SERF和HS-SERF全加法器拓扑。设计了SERF Adder的功率,延迟,功率延迟乘积(PDP)优化特性分析。为了在较小的几何尺寸下实现最佳的节能效果,提出了一种启发式方法,称为FS-SERF和HS-SERF加法器模型。

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