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A New Characterization Method for Delay and Power Dissipation of Standard Library Cells

机译:标准库单元延迟和功耗的新表征方法

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A simplified method for characterization of standard library cells based on the linear delay model is presented in this paper. The linear model is chosen as it allows rapid characterization with a modest number of simulations, while achieving acceptable accuracy. All the parameters of cell delays are defined as 50%-to-50% delays, as distinguished from 50%-to-threshold or threshold-to-50% often used in commercial tools. We found that the 50%-to-50% definition of delays is more consistent and leads to closed-form formula. A subset of library cells in a 0.25 μm technology was characterized using the proposed technique. A test circuit was subsequently generated and simulated to determine the accuracy of the proposed characterization method. SPICE simulations on the test circuit show that the timing estimations obtained through the proposed method is accurate to within 5.6%, and the power estimation was accurate to 4.2%, ignoring parasitics on interconnections.
机译:本文提出了一种基于线性延迟模型的标准库单元表征的简化方法。选择线性模型是因为它可以通过适度的仿真来快速表征,同时达到可接受的精度。单元延迟的所有参数均定义为50%至50%延迟,这与通常在商用工具中使用的50%至阈值或阈值至50%有所不同。我们发现,延迟的50%到50%的定义更加一致,并得出封闭形式的公式。使用提出的技术对0.25μm技术中的库细胞子集进行了表征。随后生成了一个测试电路并进行了仿真,以确定所提出的表征方法的准确性。在测试电路上的SPICE仿真表明,通过该方法获得的时序估计准确度在5.6%之内,而功率估计准确度在4.2%之内,而忽略了互连上的寄生效应。

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