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Electrical properties of dielectric foil for embedded PCB capacitors

机译:嵌入式PCB电容器用介电箔的电性能

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One of the methods of achieving high packaging density of passive elements on the PCB is using the capacitors embedded in multilayer PCB. Test structures consisting of embedded capacitors were fabricated using the FaradFlex? capacitive internal layers. Impedance spectroscopy and equivalent circuit modelling was used to determine their electrical properties such as the capacitance, parasitic resistance and inductance. The use of several stages of accelerated ageing allowed us to test the durability of the structures. The results showed good quality stability of the embedded elements. The spatial distribution of the capacitance of the test structures on the surface of the PCB form was tested. The influence of the process parameters during lamination on the values of embedded capacitors was revealed.
机译:在PCB上实现无源元件的高封装密度的方法之一是使用嵌入多层PCB的电容器。使用FaradFlex?制造了由嵌入式电容器组成的测试结构。电容性内部层。阻抗谱和等效电路模型用于确定其电学性质,例如电容,寄生电阻和电感。通过使用多个阶段的加速老化,我们可以测试结构的耐久性。结果表明嵌入元件具有良好的质量稳定性。测试了PCB结构表面上测试结构的电容的空间分布。揭示了层压过程中工艺参数对嵌入式电容器值的影响。

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