VLSI ARCHITECTURE OF AN AREA EFFICIENT IMAGE INTERPOLATION

摘要

Image interpolation is widely used in many image processing applications, such as digital camera, mobile phone, tablet, display device. Image interpolation is a method of estimating the new data points within the range of discrete set of known data points. Image interpolation can also be referred as image scaling, image resizing, image re-sampling and image zooming. This paper presents VLSI (Very Large Scale Integration) architecture of an area efficient image interpolation algorithm for any two dimensional (2-D) image scalar. This architecture is implemented in FPGA (Field Programmable Gate Array) and the performance of this system is simulated using Xilinx system generator and synthesized using Xilinx ISE smulation tool. Various VLSI parameters such as combinational path delay, CPU time, memory usage, number of LUTs (Look Up Tables) are measured from the synthesis report.