Folded Low Resource HARQ Detector Design and Tradeoff Analysis with Virtex 5 using PlanAhead Tool

摘要

Physical Hybrid Automatic Repeat reQuest (HARQ) Indicator Channel (PHICH) is used to report the correct reception of the uplink user data to the User Equipment (UE) in the form of Acknowledgment (ACK) or Negative ACK (NACK). In Long Term Evolution ?Advanced (LTE-A) base station and UE have multiple antenna ports to provide transmit and receive diversities. An algorithm for decoding the HARQ value at UE is designed using maximum likelihood (ML) and maximal ratio combining (MRC) methods. Further, novel low complexity receiver architectures based on the VLSI Digital Signal Processing (DSP) techniques - folding method and parallel processing with folding method to reduce the operational units is proposed to reduce resource consumption. Tradeoff analysis of the proposed structures in terms of the timing cycles, operational resource requirement and resource complexity is discussed. The proposed system is optimal compared to other possible ways as it employs parallel processing with folding approach. It is a suitable solution for the area optimized hardware implementation of physical downlink channel receiver structures LTE-A whose delay results also meet the frame timing constraint. The proposed architectures are used to implement in Field Programmable Gate Array (FPGA) Virtex-5 xc5vlx50tff1136-1 device for single/multiple antenna configurations at base station and UE.