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The investigation of self-heating effect on Si1-xGex FinFETs with different device structures, Ge concentration, and operated voltages

机译:不同器件结构,Ge浓度和工作电压对Si1-xGex FinFET的自热效应的研究

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The self-heating effect on Si1-x Ge x based FinFETs is analyzed and investigated with different device structures/dimensions, Ge concentration, and operated voltages. The module-level material properties of the thermal conductivities (k) in Si and Ge with different operated temperature (T), material thickness (t), and impurity concentration (N) are calibrated by the experimental thermo-electric measurement firstly in our simulation model. The maximum chip temperature in the Ge FinFETs is found to be ~50 °C higher than in the Si FinFETs due to the poor intrinsic material property of k in Ge material. This seriously limits the development of the Ge FinFETs in the future scaled logic devices even Si1-x Ge x material (x>0.8) has the higher intrinsic carrier mobility than pure Si. One of the possible solutions to avoid this self-heating effect in Si1-x Ge x based FinFETs is to reduce the operated voltage (<0.8V) to get the optimal device operated window among different boundary conditions including the acceptable chip temperature and the higher carrier mobility in the device.
机译:利用不同的器件结构/尺寸,Ge浓度和工作电压,分析和研究了基于Si 1-x Ge x 的FinFET的自热效应。在我们的模拟中,首先通过实验热电测量来校准具有不同工作温度(T),材料厚度(t)和杂质浓度(N)的Si和Ge中的导热率(k)的模块级材料特性。模型。发现Ge FinFET的最高芯片温度比Si FinFET高约50°C,这是因为Ge材料中k的固有材料性能差。即使Si 1-x Ge x 材料(x> 0.8)具有比纯正的更高的固有载流子迁移率,这严重限制了未来可缩放逻辑器件中Ge FinFET的发展。硅。在基于Si 1-x Ge x 的FinFET中避免这种自热效应的可能解决方案之一是降低工作电压(<0.8V)以获取最佳电压器件在不同边界条件之间的工作窗口,包括可接受的芯片温度和器件中较高的载流子迁移率。

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