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Hamming Weight Counters and Comparators based on Embedded DSP Blocks for Implementation in FPGA

机译:基于嵌入式DSP模块的汉明重量计数器和比较器,可在FPGA中实现

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This paper is dedicated to the design, implementation and evaluation of fast FPGA-based circuits that compute Hamming weights for binary vectors and compare the results with fixed thresholds and variable bounds. It is shown that digital signal processing (DSP) slices that are widely available in contemporary FPGAs may be used efficiently and they frequently provide the fastest and least resource consuming solutions. A thorough analysis and comparison of these with the best known alternatives both in hardware and in software is presented. The results are supported by numerous experiments in recent prototyping boards. A fully synthesizable hardware description language (VHDL) specification for one of the proposed core components is given that is ready to be synthesized, implemented, tested and compared in any FPGA that contains embedded DSP48E1 slices (or alternatively DSP48A1 slices from previous generations). Finally, the results of comparisons are provided that include discussions of designs in an ARM processor combined with reconfigurable logic for very long vectors.
机译:本文致力于基于FPGA的快速电路的设计,实现和评估,该电路计算二进制矢量的汉明权重,并将结果与​​固定阈值和可变范围进行比较。结果表明,可以有效利用当代FPGA中广泛使用的数字信号处理(DSP)切片,并且它们经常提供最快和最少消耗资源的解决方案。本文对这些方面与硬件和软件方面的最著名替代方案进行了全面的分析和比较。最近的原型开发板中的大量实验支持了该结果。给出了针对所建议的核心组件之一的完全可综合的硬件描述语言(VHDL)规范,该规范可随时在包含嵌入式DSP48E1片(或前代DSP48A1片)的任何FPGA中进行合成,实现,测试和比较。最后,提供了比较结果,包括对ARM处理器中的设计进行讨论,并结合了针对很长矢量的可重新配置逻辑。

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