A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers

Papameletis Christos; Keller Brion; Chickermane Vivek; Hamdioui Said; Marinissen Erik Jan

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A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers

机译：具有测试数据压缩，嵌入式内核和多个塔的3-D SIC的DfT架构和工具流程

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来源
《Design & Test of Computers, IEEE》 |2015年第4期|40-48|共9页
作者
Papameletis Christos; Keller Brion; Chickermane Vivek; Hamdioui Said; Marinissen Erik Jan;
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收录信息美国《科学引文索引》(SCI);美国《工程索引》(EI);
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正文语种 eng
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1. Single and Variable-State-Skip LFSRs: Bridging the Gap Between Test Data Compression and Test Set Embedding for IP Cores [J] . Tenentes V., Kavousianos X., Kalligeros E. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on . 2010,第10期

机译：单一状态和可变状态跳过LFSR：弥合IP核的测试数据压缩和测试集嵌入之间的差距
2. Data-Independent Pattern Run-Length Compression for Testing Embedded Cores in SoCs [J] . Xiaoyu Ruan, Rajendra S. Katti IEEE Transactions on Computers . 2007,第期

机译：与数据无关的模式运行长度压缩，用于测试SoC中的嵌入式内核
3. Test data compression using interval broadcast scan for embedded cores [J] . Ling Zhang, Ji-shun Kuang, Zhiq-qiang You Microelectronics journal . 2011,第11期

机译：使用间隔广播扫描对嵌入式核心进行数据压缩测试
4. Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers [C] . Papameletis Christos, Keller Brion, Chickermane Vivek, IEEE European Test Symposium . 2013

机译：具有嵌入式核心和多个塔架的3D-SIC的自动DfT插入和测试生成
5. Analysis of data compression and re-computation in multi-core embedded architectures. [D] . Garlapati, Mounika. 2015

机译：分析多核嵌入式体系结构中的数据压缩和重新计算。
6. Optimizing soil-coring strategies to quantify root-length-density distribution in field-grown maize: virtual coring trials using 3-D root architecture models [O] . Qian Wu, Jie Wu, Bangyou Zheng, 2018

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7. Automated DfT Insertion and Test Generation for 3D-SICs with Embedded Cores and Multiple Towers [O] . Christos Papameletis 2016

机译：具有嵌入式内核和多个塔的3D-sIC的自动DfT插入和测试生成

A DfT Architecture and Tool Flow for 3-D SICs With Test Data Compression, Embedded Cores, and Multiple Towers

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