Selective gray-coded bit-plane based low-complexity motion estimation and its hardware architecture

摘要

Today, many consumer electronics devices have video capturing capability which is one of the most time, power and memory consuming application. Motion estimation (ME) is the key part of the video coding process in terms of computational load. Thus, it is important to implement this process in a resource efficient way without degrading the encoding quality and real-time operation performance. Low bitdepth representation based ME methods draw a lot of attention in consumer electronics area mainly thanks to its highly efficient hardware and software implementations. However, these low bit-depth representation based methods generally assume that the low bit-depth images are already available. Furthermore, these methods simply neglect the binarization cost which is not a proper approach when whole encoding architecture is of concern. This paper presents a novel selective Gray-coding based ME method and its hardware architecture with an embedded system integration by making use of one of the most common interconnect architecture in consumer electronics devices. Experimental results show that it is possible to reduce computational load of binarization stage significantly while improving the ME accuracy by the proposed approach compared to methods at the same category.