Truncated gray-coded bit-plane matching based motion estimation and its hardware architecture

摘要

In this paper, an efficient low bit-depth representation based motion estimation approach which is particularly suitable for low-power mobile devices is proposed. Motion estimation is carried out using bit truncated gray-coded image pixels in the proposed approach. The hardware architecture of the proposed motion estimation method is also designed to show the effectiveness of the proposed approach. It is shown that the proposed approach provides improved motion estimation accuracy compared to the other bit-truncation based approaches. The proposed hardware architecture has low hardware complexity and consumes very low power compared to the 8-bits/pixel based hardware architectures thus, it can be easily integrated to the state of the art video encoders.