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Design of time-interleaved data acquisition system based on Network on Chip

机译:基于网络芯片网络的时间交织数据采集系统设计

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In order to solve the existing problems of time-interleaved data acquisition system's poor scalability, limited acquisition channels, and complicated clock system based on System on Chip(SoC), this work presents a novel method of high-speed data acquisition based on Network on Chip (NoC) communication architecture and time-interleaved principle. Six analog-to-digital data acquisition resource nodes are hooked up to the NoC according to the unified features of NoC router interface. The data acquisition controller controls the time-interleaved acquisition's timing sequences and realizes the remote transmission of data through two Gigabit Ethernet resource nodes. Adding timestamp to the collected data of each channel can recover the waveform signal accurately. The experiment results show that the combination of NoC communication architecture and time-interleaved data acquisition has a certain innovative significance.
机译:为了解决基于芯片(SOC)的系统的时间交织数据采集系统的可扩展性,有限的采集通道和复杂时钟系统的现有问题,这项工作提出了一种基于网络的高速数据采集的新方法芯片(NOC)通信架构和时间交错原理。根据NoC路由器接口的统一功能,六个模数数据采集资源节点连接到NOC。数据采集​​控制器控制时间交织采集的定时序列,并通过两个千兆以太网资源节点实现数据的远程传输。将时间戳添加到每个信道的收集数据可以准确地恢复波形信号。实验结果表明,NOC通信架构和时间交错数据采集的组合具有一定的创新意义。

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