Evaluating optimizations that reduce globalmemory accesses of stencil computations in GPGPUs

摘要

This work compares the performance of optimizations that transform replicated global memoryaccesses into localmemoryaccesses on3Dstencil computations in theNVIDIATeslaK80GPGPU.The optimizations reduce global memory contention caused by the set of multiprocessors. Evaluatedoptimizations are grid tiling, inserting spatial and temporal loops into kernels, register reuse,andsomeof their combinations.Astandardized experiment evaluates performance variationwithgrid size and stencil size for each optimization. Experimental data show that codes that use theseoptimizations are up to 3.3 times faster than the classical stencil formulation. It also shows thatthemost profitable optimization varieswith grid and stencil sizes.