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首页> 外文期刊>IEEE Transactions on Computers >STABLE: Stress-Aware Boolean Matching to Mitigate BTI-Induced SNM Reduction in SRAM-Based FPGAs
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STABLE: Stress-Aware Boolean Matching to Mitigate BTI-Induced SNM Reduction in SRAM-Based FPGAs

机译:稳定:应力感知布尔匹配可减轻基于SRAM的FPGA中BTI引起的SNM降低

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Biased-Temperature-Instability(BTI) aging mechanism reduces Static-Noise-Margin (SNM) of SRAM cells. This leads to a higher Soft-Error-Rate (SER), lower reliability, and lower SRAMs' stability in FPGAs. SNM partially improves by leveraging the recovery phase of BTI through flipping SRAM content. We propose STABLE, a three-step post-synthesis stress-aware technique, in order to reduce the impact of BTI-induced SNM reduction in FPGA Look-up-Tables (LUTs) using the SAT-based Boolean Matching (BM) algorithm. STABLE partitions Data-Flow-Graph (DFG) of the implemented design into different cones. First, the SAT-based BM algorithm finds a new configuration for each cone while their functionalities are preserved and all SRAMs are flipped. Second, cones that did not pass the first step can benefit from unused SRAMs in their partially-used LUTs for storing the flipped configurations of such LUTs. Finally, flipped configurations of fully-used LUTs are stored in the closest unused LUTs. The main configuration of the implemented FPGA design is swapped by the new flipped configuration, periodically. Our extensive experimental analysis demonstrates 69 and 70 percent on average improvements in the SNM reduction (DSNM) and the SER increase (DSER), respectively. Since the proposed methodology is deployed after the FPGA placement and routing of the application, the overhead is negligible.
机译:偏置温度不稳定性(BTI)老化机制可降低SRAM单元的静态噪声容限(SNM)。这会导致较高的软错误率(SER),较低的可靠性以及较低的FPGA SRAM稳定性。通过翻转SRAM内容来利用BTI的恢复阶段,可以部分改善SNM。为了减少使用基于SAT的布尔匹配(BM)算法的FPGA查找表(LUT)中BTI引起的SNM减少的影响,我们提出了三步合成后应力感知技术STABLE。 STABLE将实现的设计的数据流图(DFG)划分为不同的圆锥体。首先,基于SAT的BM算法为每个锥体找到一个新的配置,同时保留其功能并翻转所有SRAM。其次,未通过第一步的锥体可以从其部分使用的LUT中未使用的SRAM中受益,以存储此类LUT的翻转配置。最后,完全使用的LUT的翻转配置存储在最近的未使用的LUT中。已实施的FPGA设计的主要配置会定期被新的翻转配置交换。我们广泛的实验分析表明,SNM降低(DSNM)和SER增加(DSER)分别平均提高了69%和70%。由于所提出的方法是在应用程序的FPGA放置和路由之后部署的,因此开销可以忽略不计。

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