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Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques

机译:具有监督和强化学习技术的NoC中的动态电压和频率缩放

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Network-on-Chips (NoCs) are the de facto choice for designing the interconnect fabric in multicore chips due to their regularity, efficiency, simplicity, and scalability. However, NoC suffers from excessive static power and dynamic energy due to transistor leakage current and data movement between the cores and caches. Power consumption issues are only exacerbated by ever decreasing technology sizes. Dynamic Voltage and Frequency Scaling (DVFS) is one technique that seeks to reduce dynamic energy; however this often occurs at the expense of performance. In this paper, we propose LEAD Learning-enabled Energy-Aware Dynamic voltage/frequency scaling for multicore architectures using both supervised learning and reinforcement learning approaches. LEAD groups the router and its outgoing links into the same V/F domain and implements proactive DVFS mode management strategies that rely on offline trained machine learning models in order to provide optimal V/F mode selection between different voltage/frequency pairs. We present three supervised learning versions of LEAD that are based on buffer utilization, change in buffer utilization and change in energy/throughput, which allow proactive mode selection based on accurate prediction of future network parameters. We then describe a reinforcement learning approach to LEAD that optimizes the DVFS mode selection directly, obviating the need for label and threshold engineering. Simulation results using PARSEC and Splash-2 benchmarks on a 4 x 4 concentrated mesh architecture show that by using supervised learning LEAD can achieve an average dynamic energy savings of 15.4 percent for a loss in throughput of 0.8 percent with no significant impact on latency. When reinforcement learning is used, LEAD increases average dynamic energy savings to 20.3 percent at the cost of a 1.5 percent decrease in throughput and a 1.7 percent increase in latency. Overall, the more flexible reinforcement learning approach enables learning an optimal behavior for a wider range of load environments under any desired energy versus throughput tradeoff.
机译:片上网络(NoC)由于其规则性,效率,简单性和可扩展性,实际上是在多核芯片中设计互连结构的选择。但是,由于晶体管泄漏电流以及内核与高速缓存之间的数据移动,NoC承受了过多的静态功率和动态能量。不断减小的技术尺寸只会加剧功耗问题。动态电压和频率缩放(DVFS)是一种旨在减少动态能量的技术。但是,这通常是以牺牲性能为代价的。在本文中,我们提出了使用监督学习和强化学习方法为多核架构提供LEAD学习功能的能量感知动态电压/频率缩放功能。 LEAD将路由器及其输出链路分组到同一个V / F域,并实施依赖于脱机训练有素的机器学习模型的主动DVFS模式管理策略,以便在不同电压/频率对之间提供最佳V / F模式选择。我们介绍了三种基于LEAD的监督学习版本,它们基于缓冲区利用率,缓冲区利用率变化和能量/吞吐量变化,从而可以基于对未来网络参数的准确预测来进行主动模式选择。然后,我们介绍一种针对LEAD的强化学习方法,该方法可直接优化DVFS模式选择,从而消除了对标签和阈值工程的需求。在4 x 4集中式网格体系结构上使用PARSEC和Splash-2基准测试的仿真结果表明,通过使用监督学习,LEAD可以平均节省15.4%的动态能源,而吞吐量损失0.8%,而对延迟没有明显影响。当使用强化学习时,LEAD可以将平均动态节能量提高到20.3%,但代价是吞吐量减少1.5%,等待时间增加1.7%。总体而言,更灵活的强化学习方法可以在任何所需的能量与吞吐量的折衷之间,针对更广泛的负载环境学习最佳性能。

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