IRES: An integrated software and hardware interface framework for reconfigurable embedded system

摘要

Hardware/software co-design is an interesting topic for most embedded system architects. However, designers find integrating hardware and software communications interface challenging. A framework for integrating the software and hardware communication interface for computing in reconfigurable embedded systems, called IRES, is proposed. The framework supports reconfigurable computing architectures, based on traditional central processing unit and the reconfigurable field programmable gate array, and composed of the integration linker, the boot loader, small task-oriented operating objects and the hardware management unit. The integration linker enables the IRES to link hardware net-list files and tasks into one execution file, called the executor, constructed with the boot loader, the task-oriented operating kernel, the application tasks and the accelerating hardware functions. Task and hardware functions are segregated by program segment prefixes, designed to record interaction information of hardware and software resources. When the executor operates on the target-embedded environment, the implicit hardwire-call will be supported to invoke hardware functions in the task codes. The IRES successfully implements in the realised hardware platform, and this work verifies communication effectiveness between hardware and software through video compression applications.