机译:用于片上互连链路的功率有效的纠错编码
RMK Engn Coll Dept ECE Chennai 601206 Tamil Nadu India;
VIT Dept Sensor & Biomed Technol SENSE Vellore 632014 Tamil Nadu India;
Coll Engn Dept ECE Chennai 600025 Tamil Nadu India;
Univ Saskatchewan Dept Elect & Comp Engn Saskatoon SK S7N 5A9 Canada;
integrated circuit reliability; error correction codes; integrated circuit interconnections; network-on-chip; crosstalk; Hamming codes; low-power electronics; power efficient error correction coding; on-chip interconnection links; error correction probability tolerance; single error correction; double error detection; extended Hamming code; standard triplication error correction methods; data stream rerouting block; power efficiency; link power consumption; link swing voltage; delay reduction; on-chip interconnect links; high error correction capability; configurable self-calibrated power efficient five-bit error correction code; Synopsys tools; UMC technology; network-on-chip; size 90; 0 nm; word length 5 bit;
机译:正交拉丁方码中的自适应错误校正,用于低功耗,弹性片上互连网络
机译:避免串扰的新型纠错编码设计,用于可靠的片上互连链路
机译:避免串扰的增强型低复杂度双纠错编码,可实现可靠的片上互连链路
机译:一种使用汉明产品代码可靠和节能SOC链路的多线误差校正方案
机译:用于纠错码的高效解码器设计。
机译:基于CBP-Mesh和Torus互连的片上通信的新型By-by-pass-Torus架构
机译:1用于空间任务的片上DRam应用的高效纠错码
机译:一种有效的pCm错误校正和同步代码