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Reducing Startup Time in Co-Designed Virtual Machines

机译:减少共同设计的虚拟机中的启动时间

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A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventional (legacy) ISA into optimized code for an underlying implementation-specific ISA. Because translation is done dynamically, an important consideration in such systems is the startup time for performing the initial translations. Beginning with a previously proposed co-designed VM that implements the x86 ISA, we study runtime binary translation overhead effects. The co-designed x86 virtual machine is based on an adaptive translation system that uses a basic block translator for initial emulation and a superblock translator for hotspot optimization. We analyze and model VM startup performance via simulation. We observe that non-hotspot emulation via basic block translation is the major part of the startup overhead. To reduce startup translation overhead, we follow the co-designed hardware /software philosophy and propose hardware assists to dramatically accelerate basic block translations. By combining hardware assists with balanced translation strategies, the co-designed translation system reduces runtime overhead significantly and demonstrates very competitive startup performance when compared with conventional processors running a set of Windows application benchmarks.
机译:共同设计的虚拟机允许设计人员通过硬件和软件的组合来实现处理器。动态二进制转换将为常规(旧版)ISA编写的代码转换为针对特定实现的基本ISA的优化代码。由于翻译是动态完成的,因此此类系统中的重要考虑因素是执行初始翻译的启动时间。从先前提出的共同设计的实现x86 ISA的VM开始,我们研究运行时二进制转换开销效应。共同设计的x86虚拟机基于自适应翻译系统,该系统使用基本块翻译器进行初始仿真,并使用超级块翻译器进行热点优化。我们通过仿真对VM启动性能进行分析和建模。我们注意到,通过基本块转换进行的非热点仿真是启动开销的主要部分。为了减少启动翻译的开销,我们遵循共同设计的硬件/软件理念,并提出了硬件辅助功能以显着加速基本块翻译。通过将硬件辅助与平衡的转换策略相结合,与运行一组Windows应用程序基准测试的常规处理器相比,共同设计的转换系统显着减少了运行时开销,并展示了极具竞争力的启动性能。

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