Enhancing the Bandwidth of Low-Dropout Regulators Using Power Transmission Lines for High-Speed I/Os

摘要

Power supply rejection peaking in low-dropout (LDO) voltage regulators can lead to reduced bandwidth and efficiency. This paper presents a new design method by combining power transmission lines (PTLs) with LDOs for enhancing its bandwidth and efficiency. This approach is applicable for LDOs regulating high-speed I/O drivers. The PTL combined with decoupling capacitors on the package or board is used to mitigate the power supply noise (PSN). This methodology is demonstrated using printed circuit board test vehicles with off-the-shelf components. Compared to conventional approaches, the PTL solution showed an ~80% lower PSN.