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首页> 外文期刊>Components, Packaging and Manufacturing Technology, IEEE Transactions on >Time-Domain Analysis of Noise Coupling Between Package and PCB Power/Ground Planes Based on WLP-FDTD
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Time-Domain Analysis of Noise Coupling Between Package and PCB Power/Ground Planes Based on WLP-FDTD

机译:基于WLP-FDTD的封装与PCB电源/地平面之间噪声耦合的时域分析

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摘要

In this paper, a numerical approach based on weighted Laguerre polynomials finite-difference time-domain (WLP-FDTD) method is proposed to analyze noise coupling in power/ground planes between package and printed circuit board (PCB). Compared to the traditional finite-difference time-domain (FDTD) method, which is limited by Courant–Friedrich–Lecy stability condition, the proposed method has the unconditionally stable characteristic. Examples of a ball grid array package mounted on a PCB were simulated, and the numerical results show that the computation time of the proposed WLP-FDTD method can be 4.4% of that of the FDTD method at the same accuracy condition. Therefore, the proposed method has higher efficiency than the conventional FDTD method without sacrificing precision.
机译:本文提出了一种基于加权Laguerre多项式有限差分时域(WLP-FDTD)方法的数值方法,以分析封装与印刷电路板(PCB)之间电源/接地平面中的噪声耦合。与受Courant-Friedrich-Lecy稳定条件限制的传统时域有限差分(FDTD)方法相比,该方法具有无条件稳定的特性。以安装在PCB板上的球栅阵列封装为例,数值结果表明,在相同精度条件下,所提出的WLP-FDTD方法的计算时间可以是FDTD方法的4.4%。因此,在不牺牲精度的情况下,所提出的方法具有比常规FDTD方法更高的效率。

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