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机译:多时钟域NoC同步测试方法的研究
School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu, China;
Department of Electromechanical Engineering, Chengdu Institute of Technology, Chengdu, China;
School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu, China;
School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu, China;
School of Automation Engineering, University of Electronic Science and Technology of China, Chengdu, China;
data communication systems; electrical testing; network-on-chip; multi-clock domain; test; synchronization;
机译:功率约束下的多时钟域SoC的测试计划
机译:基于芯片的NoC的基于总线的同步方法
机译:基于类比的蛋白质结构预测:I.蛋白质域的空间相似和不相似结构的新数据库,用于测试和优化预测方法
机译:用于多时钟域SoC ATPG测试的改进测试方法
机译:跨同步域的知识产权组成的正式方法
机译:一项混合方法研究评估一项针对女性压力性尿失禁的手术前侵入性尿动力学测试与临床评估和非侵入性测试的随机对照试验的可行性:INVESTIGATE-I研究
机译:功率约束下多时钟域SoC的测试调度
机译:使用三种简单方法将频域空气动力学转换为时域的测试结果