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An Ultra-Low-Voltage Bulk-Driven Analog Voltage Buffer with Rail-to-Rail Input/Output Range

机译:具有轨至轨输入/输出范围的超低压大容量驱动模拟电压缓冲器

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摘要

This paper presents a low-voltage high driving capability rail-to-rail Class-AB CMOS bulk-driven (BD) operational transconductance amplifier (OTA) for analog voltage buffer with minimal current consumption. The proposed OTA design consists of adaptively biased Class-AB differential input stage to improve the effective transconductance and adaptive load relying on nonlinear current mirrors, configured in partial positive feedback mode to enhance the overall gain. In addition, because of adaptive bias and load configuration, the load-driving capability of OTA increases for a large change in differential input. The circuit is designed using UMC 65-nm CMOS process node and is operated at supply voltage of 0.5 V with a standby current consumption of 4.25 mu A. Simulation results show that the buffer based on the proposed BD-OTA achieves an average slew rate of 93.2 mV/mu s for a capacitive load of 100 pF, which is nearly 29 times that of conventional OTA with 13 increment in quiescent power dissipation.
机译:本文提出了一种用于模拟电压缓冲器的,具有最小电流消耗的低压高驱动能力轨到轨AB类CMOS批量驱动(BD)运算跨导放大器(OTA)。拟议的OTA设计包括自适应偏置的AB类差分输入级,以改善有效的跨导和依赖于非线性电流镜的自适应负载,该器件以部分正反馈模式配置以增强整体增益。此外,由于自适应偏置和负载配置,OTA的负载驱动能力会因差分输入的较大变化而增加。该电路采用UMC 65纳米CMOS工艺节点设计,工作电压为0.5 V,待机电流消耗为4.25μA。仿真结果表明,基于所提出的BD-OTA的缓冲器可实现平均压摆率。电容负载为100 pF时为93.2 mV /μs,几乎是传统OTA的29倍,静态功耗增加了13。

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