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首页> 外文期刊>Circuits, systems, and signal processing >Design of High-Performance ECG Detector for Implantable Cardiac Pacemaker Systems using Biorthogonal Wavelet Transform
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Design of High-Performance ECG Detector for Implantable Cardiac Pacemaker Systems using Biorthogonal Wavelet Transform

机译:基于双正交小波变换的可植入式心脏起搏器系统高性能ECG检测器设计

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摘要

A digital electrocardiogram (ECG) detector with low power consumption and high performance based on biorthogonal 2.2 wavelet transform and applicable for the modern implantable cardiac pacemakers is proposed in the present work. Biorthogonal 2.2 wavelet transform is chosen due to its high SNR, less number of coefficients, resemblance of shape with ECG wave and ability to increase QRS complex detection performance. Architecture of the proposed ECG detector includes modified biorthogonal 2.2 wavelet filter bank and a modified soft threshold-based QRS complex detector. Three low-pass filters and one high-pass filter with pipelined architecture are used which are lesser than the earlier designed detectors. Various blocks of proposed detector are designed to denoise the input ECG signal and then to find the correct location of R-wave. Verilog hardware description language for design entry, Modelsim embedded in Xilinx ISE v.14.1 for simulation, Virtex-6 FPGAs for synthesis and Xilinx ISE tools are used to measure the performance, area and power of the proposed ECG detector and its constituent blocks. A low detection error rate of 0.13%, positive predictivity () of 99.94% and sensitivity () of 99.92% are achieved for the proposed ECG detector which are better compared to the previous results. Also, it consumes only 20 mW of total power at 50 KHz and shows the overall delay of 18.924 ns which makes it useful for the low power and high-performance applications.
机译:本文提出了一种基于双正交2.2小波变换的低功耗,高性能的数字心电图检测器,适用于现代植入式心脏起搏器。选择双正交2.2小波变换是因为其具有较高的SNR,较少的系数数量,与ECG波的形状相似以及能够提高QRS复杂检测性能的能力。提出的ECG检测器的体系结构包括改进的双正交2.2小波滤波器组和改进的基于软阈值的QRS复数检测器。使用三个具有流水线结构的低通滤波器和一个高通滤波器,它们比早期设计的检测器要小。提议的检测器的各个模块被设计为对输入的ECG信号进行降噪,然后找到R波的正确位置。用于设计入门的Verilog硬件描述语言,用于仿真的Xilinx ISE v.14.1中嵌入的Modelsim,用于综合的Virtex-6 FPGA和Xilinx ISE工具用于测量拟议的ECG检测器及其组成模块的性能,面积和功率。提出的ECG检测器实现了0.13%的低检测错误率,99.94%的正预测性和99.92%的灵敏性,与以前的结果相比更好。而且,它在50 KHz时仅消耗20 mW的总功率,并显示出18.924 ns的总延迟,这使其可用于低功率和高性能应用。

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