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High-Throughput Architecture for Both Lossless and Near-lossless Compression Modes of LOCO-I Algorithm

机译:用于Loco-i算法的无损和近无损压缩模式的高吞吐量架构

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Real-time image lossless and near-lossless compression based on LOCO-I algorithm is in great demand in many critical missions, such as satellite remote sensing, space exploration, and nuclear medical imaging, for its excellent complexity/compression rate tradeoff. However, the real-time implementation of LOCO-I encounters two bottlenecks in error prediction: the context conflict in context update and the pixel reconstruction loop in near-lossless mode, which always limit the overall throughput in practice. This paper adopts a patch-wise compression method and proposes a high-performance globally pipelined hardware architecture with spatial parallelism in local, in which patch-wise dual parallel error prediction (PEP) modules are designed. The PEP gains an extra pixel cycle and thus, alleviates both the two bottlenecks. Besides, an equivalent simplification scheme is designed to accelerate the error quantization computation, the most time and resource consuming procedure in the pixel reconstruction loop, saving the resource usage, and reducing computing delay. The proposed encoder is able to compress each image patch independently in either lossless or near-lossless mode by parameter setting. It facilitates the Region of Interests compression so as to improve the overall compression ratio and achieves excellent information fidelity. Moreover, the possible error propagation can be prevented and constrained within one single patch. The proposed architecture is implemented on a XILINX Virtex6-75t FPGA and achieves a maximum throughput up to 51.684 MPixel/s. It is the fastest architecture reported in the literature which implements both lossless and near-lossless compression modes.
机译:基于Loco-I算法的实时图像无损和近无损压缩在许多关键任务中,如卫星遥感,空间探索和核医学成像,可实现优异的复杂性/压缩速率权衡。但是,Loco-i的实时实现遇到错误预测中的两个瓶颈:上下文更新中的上下文冲突以及近无损模式中的像素重建循环,始终限制实践中的整体吞吐量。本文采用了Patch-Wise压缩方法,并提出了一种高性能全局流水线硬件架构,在本地具有空间并行性,其中设计了修补程序双行误差预测(PEP)模块。 PEP获得额外的像素周期,从而减轻了两个瓶颈。此外,旨在旨在加速像素重建循环中的最误差量化计算,最多的时间和资源消耗过程,节省资源使用以及减少计算延迟的误差量化计算。所提出的编码器能够通过参数设置独立地压缩每个图像贴片或近无损模式。它促进了感兴趣的区域压缩,以提高整体压缩比,实现优秀的信息保真度。此外,可以防止可能的误差传播并在一个单个补丁中受累。所提出的架构是在Xilinx Virtex6-75T FPGA上实现的,并且达到高达51.684 mpixel / s的最大吞吐量。它是在文献中报告的最快架构,它实现了无损和近无损压缩模式。

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