An integrated CMOS mixed-mode signal processor for disk drive readchannel applications

摘要

A read channel processor architecture for Winchester disk drivenapplications is presented, designed to operate with data rates from 10nto 32 Mbits/sec with (1,7) Run Length Limited (RLL) encoding on a 5 voltn1-Μm CMOS technology. The processor performs the functions of pulsendetection and data separation using integrated CMOS analog amplifiersnand filters and a digital phase-locked loop (PLL). It integrates many ofnthe functions previously performed with discrete components and hasnenhanced programmability to more fully support Zoned Bit Recordingn(ZBR). This paper presents an architectural overview of the processornwith comparisons to existing solutions, detailing the system constraintsnof the architecture. Unique CMOS circuit designs are presented alongnwith the pipelined architecture of the digital PLL