Time-interleaved sigma-delta modulator using output prediction scheme

摘要

A time-interleaved sigma-delta modulator using the output prediction scheme is proposed. This approach uses only one integrator channel along with incomplete integrator output terms to eliminate the quantizer domino which is a key limit for practical circuit implementation of conventional time-interleaved sigma-delta modulators. In addition, channel mismatch effects due to mismatch within multiple integrator feedback paths can be reduced by optimizing the feedback path. An equivalent two-channel time-interleaved version of the conventional second-order sigma-delta modulator is realized to verify the proposed method.