CMOS High-CMRR Current Output Stages

摘要

Two CMOS current output stages are presented. Compared to the traditional solution, which exhibits unbalanced operation, the proposed ones exploit an auxiliary high-gain feedback loop which provides differential drive, thereby highly improving the common-mode rejection ratio (CMRR). Prototypes are designed and fabricated in a 0.35-mum technology and experimental results confirm that a CMRR increase greater than 20 dB can be achieved and, for one of the two solutions, without increasing the voltage requirements.