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Delta–Sigma D/A Converter Using Binary- Weighted Digital-to-Analog Differentiator for Second-Order Mismatch Shaping

机译:使用二进制加权数模微分器的Delta-Sigma D / A转换器用于二阶失配整形

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A multibit digital–analog (D/A) differentiator is used in the forward correction path of a dual-truncation delta–sigma ( $Delta Sigma$) D/A converter (DAC) to obtain the desired second-order noise-shaping function for converting mismatch-induced in-band quantization noise to out-of-band frequencies. The multibit D/A differentiator can be configured by embedding binary-weighted current-steering DAC elements into digital differentiators without concern of linearity. In simulations, the newly proposed $Delta Sigma$ DAC is 20 dB more effective in noise reduction than widely adopted first-order noise-shaping methods under the identical mismatch conditions of DAC elements (2% in average global mismatch and 0.3% in adjacent element mismatch). This method also offers advantages of compact circuit implementation with smaller routing area and less power consumption over those of thermometer-coded or digital signal processing based counterparts with the same second-order mismatch shaping.
机译:在双截断delta-sigma($ Delta Sigma $)D / A转换器(DAC)的正向校正路径中使用了多位数模(D / A)微分器,以获得所需的二阶噪声整形功能用于将由失配引起的带内量化噪声转换为带外频率。可以通过将二进制加权的电流控制DAC元素嵌入数字微分器来配置多位D / A微分器,而无需考虑线性度。在仿真中,在相同的DAC元件失配条件下,新提出的$ Delta Sigma $ DAC的降噪效果比广泛采用的一阶噪声整形方法高20 dB(平均全局失配为2%,相邻元件为0.3%不匹配)。与具有相同的二阶失配整形的温度计编码或基于数字信号处理的对应方法相比,该方法还具有紧凑的电路实现,较小的布线面积和较小的功耗的优点。

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