Current-Mode Analog Adaptive Mechanism for Ultra-Low-Power Neural Networks

摘要

Neural networks (NNs) implemented at the transistor level are powerful adaptive systems. They can perform hundreds of operations in parallel but at the expense of a large number of building blocks. In the case of analog realization, an extremely low chip area and low power dissipation can be achieved. To accomplish this, the building blocks should be simple. This brief presents a new current-mode low-complexity flexible adaptive mechanism (ADM) with a strongly reduced leakage in analog memory. Input signals ranging from 0.5 to 20 $muhbox{A}$ are held for 10–50 ms, with the leakage rate from 0.2%/ms to 0.04%/ms, respectively, depending on temperature. A small storage capacitor of 200 fF enables a short write time ( $<$ 100 ns). A single ADM cell occupies 1400 $muhbox{m}^{2}$ when realized in the Taiwan Semiconductor Manufacturing Company Ltd. CMOS 0.18-$muhbox{m}$ technology. The potential application of this NN is envisioned in a mobile platform based on a wireless sensor network to be used for online analysis of electrocardiography signals.