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Low-Cost FIR Filter Designs Based on Faithfully Rounded Truncated Multiple Constant Multiplication/Accumulation

机译:基于真实舍入的截断多常数乘法/累加的低成本FIR滤波器设计

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Low-cost finite impulse response (FIR) designs are presented using the concept of faithfully rounded truncated multipliers. We jointly consider the optimization of bit width and hardware resources without sacrificing the frequency response and output signal precision. Nonuniform coefficient quantization with proper filter order is proposed to minimize total area cost. Multiple constant multiplication/accumulation in a direct FIR structure is implemented using an improved version of truncated multipliers. Comparisons with previous FIR design approaches show that the proposed designs achieve the best area and power results.
机译:低成本的有限冲激响应(FIR)设计采用了忠实舍入的舍位乘法器的概念。我们共同考虑在不牺牲频率响应和输出信号精度的情况下优化位宽和硬件资源。为了使总面积成本最小化,提出了具有适当滤波器阶数的非均匀系数量化。使用截断乘法器的改进版本可实现直接FIR结构中的多个常数乘法/累加。与以前的FIR设计方法的比较表明,所提出的设计达到了最佳的面积和功率结果。

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